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Syllabus for

Harvard Extension School CSCI Eastward-93 (formerly CSCI E-287)

Computer Architecture (25331)

Leap 2020
Site last revised 5:51 PM 11-May-2020

Dr. James L. Frankel

I've posted a new Awarding Note -- AN8 -- that has a more detailed description of the Retentivity Subsystem. Encounter AN8 The Memory Subsystem and Memory Addresses.txt.

I've posted a new Register Assortment slide. See Register Array.

I've posted a new Comparators slide deck. Run into Comparators.

Problem Set 4 has been revised to include boosted requirements and details in bug 6 through 8, inclusive.

The due date for the VHDL Counter in Trouble Prepare 3 is now ane week later. Information technology is now due on March 15, 2020.

Problem Set 4 has been revised to include extra credit sections.

Please perform pin assignments for VHDL in PS3 and for all VHDL code in this class using the aspect chip_pin method discussed in the VHDL slides.

Later the upcoming Spring 2020 semester, the next fourth dimension CSCI E-93 will be offered is in the Fall 2021 semester.

We will be holding our first department coming together on Tuesday, Jan 28, 2020 at vi:45 PM ET. Note that this section meeting is *before* our beginning form meeting. Both department and class meetings are live streamed and are too available after grade for subsequently viewing and reviewing.

Many links in the form website are not yet available. They will be activated as the course progresses.

Concluding Project Presentation Slots:

Time Slot Available
7:00 PM - 7:xv PM Slot 1 Filled by Harry
7:15 PM - seven:xxx PM Slot 2 Filled by Marker
7:thirty PM - seven:45 PM Slot 3 Filled by Al
vii:45 PM - 8:00 PM Slot 4 Filled by Bob
8:00 PM - eight:15 PM Slot 5 Filled by Sandeep
8:15 PM - eight:30 PM Slot half-dozen Filled by Nanako
8:30 PM - eight:45 PM Slot 7 Filled by Eric
8:45 PM - ix:00 PM Slot 8 Filled past Alan
9:00 PM - ix:xv PM Slot 9 Filled by Kevin
9:15 PM - 9:30 PM Slot ten Filled by McCoy
nine:30 PM - 9:45 PM Slot eleven Filled by Richard
9:45 PM - ten:00 PM Slot 12 Filled by Martin

Quick Links:

  • Class Hours & Location
  • Altitude Learning Links including Video Streaming, Chat, and the Midterm Examination
    • During Grade
    • After Grade
    • Midterm Examination
  • Prerequisites
  • Brief abstract
  • Overview
  • Books/Form Bibliography
  • Instructor
  • Teaching Assistants
  • Students
  • Grading
    • Problem Sets
    • Late Policy
    • Commented and Documented
    • Programming Languages
    • Using git
    • Midterm Test
  • Plagiarizing
  • Approximate Schedule
  • Hardware Related References
    • Altera Information
    • VHDL Programs
    • CSCI Eastward-93 Application Notes for using the Altera FPGAs
    • Laboratory Documents and Programs
    • USB to Serial Adapter
    • Static dissipative devices used in the lab
  • Software and Course Documents On-Line
    • Slides used in grade
    • Questionnaire and Trouble Sets
    • Piazza Wiki/Forum
    • Online Software: Windows 10, GNU, Cygwin, Windows Subsystem for Linux, Google Drawings, Visio, Dia, OmniGraffle, draw.io, SPIM, etc.
    • Electronics
    • Hardware
    • Harvard Academy It
    • Section Home Page

Tuesdays eight:00-10:fifteen PM ET in 53 Church Street, Room L01.

Distance Learning Links including Video Streaming, Chat, and the Midterm Test:

During Class:

Video Streaming:

In addition to beingness able to participate in section & class in person, both are live streamed and as well recorded. Students are encouraged to share their video feed and to inquire questions verbally using their audio/video link in HELIX Classroom/Zoom. The section & class live video stream is bachelor through the class Canvas spider web site under Grade Meetings.

Conversation:

Questions tin can too be asked using the text Conversation facility in HELIX Classroom/Zoom during form meetings & during section meetings. Delight use the chat feature available in HELIX Classroom/Zoom rather than Canvas conversation. Nosotros volition *not* be monitoring Sheet chat.

After Grade:

Videos of grade and section are bachelor on the course's Canvas spider web site under Grade Meetings.

Midterm Test

Our midterm exam is a three hour long proctored exam. Students unable to come up to campus for the midtem exam tin make arrangements to accept the exam in absentia in a proctored setting, at an alternative location. Of course, any student -- including distance students -- may choose to come to campus to take the exam. Students who practice non take the test on campus in our classroom are required to procure the services of a Harvard-approved proctor as described in https://www.extension.harvard.edu/resources-policies/exams-grades-transcripts/exams-online-courses. That document states that the exam must be taken "inside a specific 24-hour catamenia." In our instance, the 24-hour period starts on the date and fourth dimension of our in-class exam and ends 24 hours later. That is, the exam must be started within that 24-hour period.

The exam allows open-volume access to *only* the iii required textbooks. No notes are allowed. No electronic devices are allowed.

Prerequisites:

Knowledge of data structures and programming feel CSCI Eastward-22 (formerly CSCI E-119) (Data Structures) with some background in boolean/digital logic preferred, but not required ENSC Eastward-123 (Laboratory Electronics: Digital Circuit Pattern) or equivalents.

Brief abstruse:

A report of the central concepts in the blueprint and organization of modern reckoner systems. Topics include figurer organization, instruction fix pattern, processor pattern, retentiveness system pattern, timing bug, interrupts, microcoding, and various performance-enhancing parallel techniques such as prefetching, pipelining, co-operative prediction, superscalar execution, and massive-parallel processing. Study of existing architectures using CISC, RISC, vector, data parallel, and VLIW designs. An all-encompassing lab project will exist required of all students.

four credits. Graduate credit.

Overview:

Informatics East-93 is a comprehensive grade in the architecture and organization of modernistic computers. Students are already expected to be comfy with designing, coding, and debugging programs of modest complexity while employing expert programming style, structured techniques, and employing appropriate data structures as appropriate. In particular, this form is not a programming course, but students volition exist required to write several significant programs. In add-on, some experience with digital logic and gates and with programming in assembler language is preferred.

A significant portion of the class will involve the design and implementation of a major term project. The project will exist developed by each pupil working alone. That project is the core of a new calculator'south cardinal processing unit including the data path, instruction fetch and decoding unit, and registers implemented using an Altera FPGA. Initially, both the classroom lectures and the section meetings will exist covering material important to the design and implementation of the last project. Later in the semester, avant-garde topics will be covered in grade; however, both the class and sections will keep to support students as term projects progress. Throughout the semester, students will be working on and debugging their projects leading to their complete implementation and sit-in.

Because the course requires a significant term project involving both programming and hardware implementation, the assignments volition be time-consuming; therefore, a significant fourth dimension commitment to the form is necessary. Although the relevant feel of students in the form is ordinarily quite diverse, depending on background, it is not unusual for students to spend 15-twenty hours per week or more completing the readings and homework assignments. Although the computers are available more-or-less around the clock, occasionally they volition suddenly get unavailable (this is known every bit a crash). Every bit with all such events, they always seem to occur at the worst possible time. Program your computer work and so that it is complete in advance of the deadlines. You lot have now been forewarned!

Books/Course Bibliography:

All course books are available from the Harvard Coop and are on reserve at Lamont Library. At that place are links bachelor on Canvas to find the Libary Reserves and, for some books, these include View online versions. A direct link to the books at the Coop is available for on-line purchasing. In addition, all registered students will be eligible for library services (access, borrowing privileges, group study rooms) in FAS libraries, just like any other pupil in FAS. All registered students volition continue to have access to Harvard Library online resources.

Required Textbooks:

Gimmicky Logic Pattern, 2d Edition; Randy H. Katz and Gaetano Borriello; Prentice Hall Inc., 2005; ISBN-13 978-0-201-30857-0; ISBN-10 0-201-30857-6; Errata for the Second Edition

Computer Organization and Pattern: The Hardware/Software Interface, Fifth Edition; David A. Patterson and John L. Hennessy; Morgan Kaufmann/Elsevier, September 2013; ISBN-thirteen 978-0-12-407726-iii; Errata for the Fourth Revised Edition; Errata for the Fifth Edition

The Designer'south Guide to VHDL, Tertiary Edition; Peter J. Ashenden; Morgan Kaufmann/Elsevier, May 2008; ISBN-13 978-0-12-088785-9; ISBN-10 0-12-088785-1; Errata for the Outset to Fourth Printings

Optional Additional Digital Electronics Book:

Digital Systems: Principles and Applications, 12th Edition; Ronald J. Tocci, Neal S. Widmer, and Gregory L. Moss; Prentice Hall Inc., 2017; ISBN-xiii 978-0-13-422013-0

Optional Electronics Books:

The Art of Electronics, Third Edition; Paul Horowitz and Winfield Hill; Cambridge University Printing, Apr 2015; ISBN-13 978-0521809269

Learning the Art of Electronics: A Easily-On Lab Form; Thomas C. Hayes and Paul Horowitz; Cambridge Academy Printing, March 2016; ISBN-thirteen 978-0521177238

Optional Additional Reckoner Compages Books:

Computer Compages: A Quantitative Approach, 6th Edition; John L. Hennessy and David A. Patterson; Morgan Kaufmann/Elsevier, November 2017; ISBN 978-0-12-811905-1

MIPS RISC Architecture, Second Edition; Gerry Kane and Joseph Heinrich; Prentice Hall Inc., 1992; ISBN-13 978-0-13-590472-5; ISBN-x 0-13-590472-two

Modern Operating Systems, Fourth Edition; Andrew S. Tanenbaum and Herbert Bos; Prentice Hall Inc., 2015; ISBN-13 978-0-xiii-359162-0; ISBN-10 0-13-359162-X

Optional VHDL Book:

Fundamentals of Digital Logic with VHDL Design with CD-ROM, third Edition; Stephen D. Brown and Zvonko G. Vranesic; McGraw-Loma Higher Education, 2009; ISBN-xiii 978-0-07-722143-0; ISBN-10 0-07-722143-v. As of 2019, this book is out of impress. This book includes a CD-ROM with the educatee edition of Altera's MAX+PLUS 2 CAD software. In that location is besides a website for this book.

Optional git Books:

Dangit, Git!: Recipes for Gitting out of a Git Mess; Katie Sylor-Miller and Julia Evans; This short on-line book describes git fundamentals.

Pro Git, 2nd Edition; Scott Chacon and Ben Straub; Apress, 2014; ISBN-xiii 978-1484200773; ISBN-10 9781484200773. This is a comprehensive book about git. Information technology is besides available for gratuitous download at the web site to a higher place.

There will besides exist other handouts & supplementary readings

Teacher:

Dr. James Fifty. FrankelDr. Frankel's Photo,
  • President, Frankel and Associates, Incorporated
  • Brief Bio:
    • Prof. Frankel's groundwork includes piece of work in showtime-ups, academia, and inquiry.
    • He has worked at IBM Research Yorktown Heights, Xerox PARC, Digital Equipment Corporation, Thinking Machines, and Mitsubishi Electric Research Labs.
    • In addition to Frankel and Associates, he has built CommerceTone, Auripay, Incentive Targeting, and has worked with numerous consulting clients.
    • He was the 2019 recipient of the Petra Shattuck Excellence in Teaching Award.
  • Office hours:
    • Science Centre 101e
    • Past date
  • Electronic mail address: Jamie e-mail address.  Questions whose answers would be relevant to the whole class should be posed via Piazza. When email is appropriate (for grading questions, personal issues, etc.), east-mail should be sent to both TAs and also to the professor.
  • Phone: +1 617.401.7480

Teaching Assistants:

Nosotros have two Teaching Assistants (TAs) for the form. The TAs concord a weekly section and office hours as described below. Attendance at the section is strongly recommended. When appropriate to send eastward-mail, please send e-mail to both TAs and to the course instructor.

TA Section Meeting Fourth dimension/Place Office Hours Time/Place East-mail Address/Phone
Mark Ford
Mark's Photo,
Department Site
Tuesday,
6:45-seven:45 PM ET,
1 Story Street, Room 303
Monday,
6:thirty-7:xxx PM ET by appt. just,
Science Center, Room 101e
E-mail: Mark's e-mail address; +i.978.496.7213 (1:00 PM - 9:00 PM ET). If in that location's no reply, please exit a message with your proper name and a call-dorsum number. Questions whose answers would be relevant to the whole course should be posed via Piazza. When e-mail is appropriate (for grading questions, personal issues, etc.), eastward-mail should exist sent to both TAs and too to the professor.
Marker Warren
Mark's Photo,
Department Site
Tuesday,
6:45-seven:45 PM ET,
i Story Street, Room 303
Wednesday,
6:thirty-7:30 PM ET by appt. only,
Science Center, Room 101e
E-post: Mark's e-mail address; +1.303.803.2261 (11:00 AM - 9:00 PM ET). If there'southward no respond, please get out a message with your name and a telephone call-back number. Questions whose answers would be relevant to the whole form should be posed via Piazza. When email is appropriate (for grading questions, personal issues, etc.), e-mail should be sent to both TAs and too to the professor.

Students:

We'd all like to meet the other students in the course -- both near and far. Please utilise the Canvas Say Hello! facility to upload a brief video (about a infinitesimal or two in duration) introducing yourself to the class.

Also, please mail your primary location using the Canvas Student Locations facility.

Grading:

Undergraduate-credit and graduate-credit students:

  • 35% Programming assignments & problem sets
  • 15% Midterm exam (open volume)
  • 50% Term projection (significant in telescopic; required of undergraduate-credit and graduate-credit students; a more all-encompassing term project is required of graduate-credit students)

Problem Sets:

All problem sets and programming assignments are due at midnight Eastern Fourth dimension on Sunday night (i.due east., midnight between Dominicus and Monday) unless otherwise stated in the assignment or in the syllabus. Unless otherwise stated, all programming assignment solutions must be written in C, C++, or Coffee, take run successfully on our Amazon EC2 Linux AMI instance with hostname is cscie93.dce.harvard.edu or on the Altera DE2-70 or DE2-115 FPGA system, as appropriate, be submitted using "git" on https://github.com/ (or, in dire circumstances, via e-mail only if agreed to by your TA), be well-written (clear coding style, modular structure, appropriately commented and documented in English), and tested (include any programs and/or beat scripts used in testing your solution as part of your submission). Of course, the solutions may be written and tested using whatever system of the student's choosing; nonetheless, when the solution is consummate, it must exist pushed to the git code repository on https://github.com/. If you don't have your own native Unix/Linux system and run under Windows, you may find it useful to employ code development tools under Cygwin. We will be grading the Unix/Linux solutions based on their beliefs on the cscie93.dce.harvard.edu computer. Therefore, you should make sure that the final version of Unix/Linux programs that you submit for grading works properly on the cscie93.dce.harvard.edu computer. In addition, each submission must include a makefile to build the assignment. The grade for programming assignments will include all of these attributes.

Y'all tin establish an business relationship on cscie93.dce.harvard.edu past accessing the website at URL https://ac-web.dce.harvard.edu/ and clicking on "Reset Password." Please note that the username shown on this screen is the username you lot volition use to login to our server. Our cscie93.dce.harvard.edu computer may be accessed for remote login using "ssh" over the Internet. Files may be transferred to these systems using "secure ftp" (SFTP). If you are using a Windows organisation, the SecureCRT and SecureFX programs are bachelor from the Scientific discipline Center at http://downloads.fas.harvard.edu/download; these programs implement "ssh" and "secure ftp," respectively. On Unix/Linux systems, the trounce commands "ssh" and "sftp"/"scp" can be used for ssh and SFTP, respectively. Call back, in improver to handing in all parts of the problem set solution or programming assignment plan, sample runs of the program which demonstrate that the program works must be attached.

Some assignments may include Extra Credit programming problems. The Extra Credit programming problems tin can be completed to earn points that tin increase the overall grade on the programming portion of your trouble set; still, the grade on the programming portion of a problem fix including extra credit volition e'er exceed the full credit possible grade on the programming portion. That is, the Extra Credit programming trouble(s) tin be used to brand up for deficiencies in other programming portions of the problem set to allow a college grade to be earned. Extra Credit points from one problem set are not transferrable and may non be used on whatever other trouble sets.

Late Policy:

All problem sets except for Trouble Ready 0 may be submitted tardily for partial credit. A late homework will lose 5% of its original course for each twenty-four hours information technology is tardily (east.g. an assignment handed in two and a half days late will receive its original class multiplied by 0.85). Late assignments may be submitted via GitHub and an east-mail bulletin notifying the instructor and the teaching assistants should be sent immediately after the late assignment is submitted. In addition, each student is given five complimentary late days that may be used freely during the semester. Yet, keep in mind that nearly all of the assignments are congenital on the previous assignments; handing in ane consignment tardily does non extend the due date for subsequent assignments. The scope and difficultly level of the assignments increases during the class; therefore, nosotros recommend against using the five free late days early in the class.

Problem sets may also be revised and/or completed and resubmitted late for partial credit devalued by the aforementioned five% rule detailed to a higher place for each twenty-four hour period late information technology is resubmitted.

Commented and Documented:

In the "Grading: Problem Sets" section above, the phrase "commented and documented" is used; this paragraph will clarify the necessary comments and documentation that should exist provided with all programs. First, at that place should exist a description of the entire awarding. This should include the user interface (i.e., how a user interacts with the program) and an caption of what the programme does. This documentation may be in a separate file from the program itself. Second, in that location should be a description at the start of each file which outlines the contents of that file. Third, each routine, role, method, etc. must be preceded by a section describing: (1) the name of the routine, (two) the purpose/function of the routine, (3) the parameters to the routine (name, type, pregnant), (4) the return value from the routine (type, pregnant), and (5) any side-furnishings (including modifying global variables, performing I/O, modifying heap-based storage, etc.) that the routine may cause. Fourth, declarations of variables should be commented with their purpose. Fifth, blocks of code should be commented to draw the purpose of the lawmaking department. 6th, whatever complex or hard to sympathise code statements or fragments should be commented to analyze their beliefs.

Programming Languages:

In addition to programming in conventional languages (either C, C++, or Coffee), students will acquire how to write code in VHDL. This is the Hardware Description Language that we volition utilise to configure the Altera FPGA. All students are required to apply the Altera Quartus Two Web Edition Software, Version 13.0, Service Pack ane, released June, 2013. This software may be downloaded from the Altera web site, is free, and no license is required. The software runs but on either Windows or Linux. The specific version of Altera Quartus software that students should use may be updated during the grade term.

Using git:

When using "git" and https://github.com/, make certain to follow the data on using "git" and setting up your repository that is bachelor on the section web site. Create a named branch for each of your problem sets every bit follows: specify "problem-set-0" for Problem Set 0 (the course questionnaire, fix this program, and discussion count), specify "problem-set-1" for Problem Set ane, "problem-set-2" for Trouble Fix 2, etc., specify "prelim-term-projection" for the Preliminary Final Project Problem Set, and specify "term-project" for the Term Project.

Midterm Test:

Encounter Altitude Learning Links: Midterm Exam for more information for distance students.

Plagiarizing:

All work should be the personal creation of the individual student. Students are free to consult with each other and to report together, just all problem fix solutions, programming assignments, exams, and the final project must be the personal contribution of each individual student. More than explicitly, whenever a concept is reduced to a detailed algorithm or a program, no collaboration is allowed. If a paper, assignment, exam, program, or final project contains whatever information, algorithms, program fragments or other intellectual belongings taken from some other source, that source and cloth must be explicitly identified and credit given. If yous accept any questions about this policy, it is the student's responsibility to clarify whether their activity is considered plagiarism.

Estimate Schedule:

November 2019 Description
vii Registration opens at 9 AM ET for degree candidates.
12 Registration opens at nine AM ET for all students.
January Description
20 Martin Luther King Jr. Day
23 Registration deadline. Last twenty-four hours to annals for jump term courses. Late registration is not permitted after this date.
24-Feb 2 Course change period For registered students only
27 Classes begin
28 Introduction, class data & policies, outline, schedule. Review of simple digital logic.
February Clarification
2 at Midnight Problem Set 0 (using git, the course questionnaire, set this plan, and word count) due.
2 Grade changes deadline. Course driblet deadline for total-tuition refund.
4 Flip-flops as retentiveness building blocks. Avant-garde Boolean logic, computer arithmetic, useful laws and theorems, sum of products form, minimization, technology metrics.
For today, read Katz chapters 1 and 2 and Patterson/Hennessy appendix B (4/east revised press: appendix C) on The Nuts of Logic Blueprint.
ix Form drop borderline for half-tuition refund
9 at Midnight Trouble Set 1 due.
eleven Place values, numeric encodings, gray codes & Karnaugh maps, canonical forms (minterms & maxterms), dealing with time in combinational logic networks, MIPS assembly language programming and instruction fix design, addressing modes.
For today, read Katz chapter three and Patterson/Hennessy chapters ane and 2 (iv/due east revised printing: chapters 1 and 2) on Computer Abstractions and Technology, and Instructions: Language of the Reckoner.
17 President's Day
18 Designing a processor: the datapath and control logic, Go on to discuss the MIPS education prepare and a simple cake diagram of its implementation.
Distribute Altera/Terasic hardware.
For today, read Katz chapter iv and Patterson/Hennessy chapter 4 (4/e revised printing: chapter 4) on The Processor.
23 at Midnight Problem Set 2 due.
25 Discuss the instruction sets for the PDP-8 and the PDP-11.
For today, read Katz chapters 5 and 6 and Patterson/Hennessy chapter 3 (four/e revised press: chapter 3) on Arithmetic for Computers.
March Description
three Waveform diagrams, glitches, and hazards. Complete the PDP-11 pedagogy ready including subroutines and status codes. Endianness. Finite land machines. Material to be covered in the midterm exam.
For today, read Katz capacity seven and viii.
8 at Midnight Problem Set 3 due.
10 Midterm exam .
For today, read Patterson/Hennessy chapter v.6-5.18 (iv/east revised press: affiliate 5.4-5.14) on the retentivity hierarchy.
15-21 Spring Break
24 Details of implementing an assembler. MIF file description. Performing I/O operations using retentiveness-mapped I/O. The interface to our memory subsystem.
For today, read Patterson/Hennessy appendix A (4/e revised printing: appendix B) on Assemblers, Linkers, and the SPIM Simulator and Patterson/Hennessy affiliate 5.ii, 5.11 (4/e revised printing: chapter half dozen) on I/O devices.
29 at Midnight Trouble Prepare four due.
31 Review the midterm test. Series communication, Caching, Virtual retentiveness.
For today, read Patterson/Hennessy chapter five.1-5.v (4/e revised printing: chapter 5.1-5.three) on caches.
April Description
5 at Midnight Preliminary Final Project Problem Set due.
7 Virtual memory (continued), TLB's (Translation Lookaside Buffers), Page Replacement strategies, Basic electronics, Pipelining.
12 at Midnight Problem Set up five due.
14 Pipelining (connected). Parallelism. SISD, SIMD, & MIMD architectures. Locality of data to processor.
For today, read Patterson/Hennessy chapter vi (4/e revised printing: chapter 7) on parallel processing.
21 VLSI circuit (custom silicon) design.
24 Withdrawal borderline (no tuition refund)
26 at Midnight Problem Gear up 6 due.
28 I/O (Input/Output) Systems, interrupts. Vector computers. Data parallel computers.
May Description
5 RISC vs. CISC architectures. VLIW (Very Long Instruction Word) computers. Mapping a high-level language onto a low-level architecture. Additional topics.
11-16 Final exams and last grade meetings
12 Final Form Coming together during usual section and grade time. Pupil project presentations/demonstrations. Term Project due.
15 by 2 PM ET All Final Projection code, documentation, and presentation material must be submitted.
15 between 5 PM ET to seven PM ET Alternating and terminal fourth dimension to return all borrowed hardware.
25 Memorial Day
26 Grades available online in Online Services
28 Kickoff

Hardware Related References:

Altera Information:

The class project will utilize the Altera Cyclone Two FPGA (EP2C70F896C6N) on our Altera Development and Instruction DE2-70 boards (or alternatively, the Altera Cyclone IV FPGA (EP4CE115F29C7) on DE2-115 boards). Students taking the course in person in Cambridge will be able to borrow the hardware for utilise during the semester. Distance students must purchase their own Altera DE2-115 Development and Instruction Board. This hardware is available at academic pricing from the Terasic web site.

As mentioned to a higher place, the Quartus II software that nosotros will be utilizing to program the FPGAs, runs but on either Windows or Linux. We strongly recommended that only the Windows version be used. For those of you lot using Apple Mac computers and macOS, running Quartus II under a VM on a Mac works well.

Altera data is available for:

  • the Altera University Plan,
  • the Altera DE2-70 Development and Education Board on Altera's Web Site,
  • the Altera DE2-lxx Development and Education Lath on Terasic's Spider web Site,
  • the Altera DE2-115 Development and Education Board on Altera'south Web Site,
  • the Altera DE2-115 Development and Education Board on Terasic'due south Web Site,
  • the Altera Quartus 2 Web Edition Software, Version 13.0, Service Pack 1 for Windows,
  • the Altera Quartus 2 Web Edition Software, Version 13.0, Service Pack ane for Linux,
  • the Altera Quartus Two Web Edition Software.

Equally stated on the Altera web site, Quartus II version xiii.0sp1 supports all Altera University Plan FPGA boards, including our DE2-seventy and DE2-115 boards. This is the version of Quartus 2 that we will all be using in the class. Although new versions of the Quartus Ii software will be adult and released each twelvemonth by Altera, Quartus 2 version 13.0sp1 will keep to be maintained and updated for the foreseeable future.

The Quartus II software starting from version 13.1 does not include support for the Cyclone Ii family of FPGAs, which are used in DE2-70 boards. Note that the DE2-115 lath uses the Cyclone Iv family, so is not affected. The Whirlwind Iv family of FPGAs is still supported in Quartus 2 version 17.0.

In addition, starting in Quartus Ii version 14.0 there will no longer exist support for 32-bit computers (Quartus II V14.0 tin only be used on 64 bit computers).

Older class projects used the Altera FLEX 10K device (EPF10K70RC240-four) on Altera University Programme UP2 boards. Support for the Altera FLEX 10K device family has been removed from Quartus II software version 9.1 and future releases. The last back up for these device families is version 9.0 SP2, which will be bachelor permanently on Altera'south Download Center.

When nosotros were using the UP2 Education Board, the programming cable that nosotros used was the USB Blaster Cablevision manufactured past Terasic, but it is identical to the Altera USB-Equalizer and uses the same drivers.

Altera information is bachelor for:

  • the Altera UP2 Educational activity Board,
  • the Altera University Plan UP2 Education Kit, User Guide,
  • the ByteBlaster II User Guide,
  • the ByteBlasterMV User Guide,
  • the USB-Blaster User Guide,
  • the Installation of Altera Programming Cable Drivers,
  • the Altera University Program Design Software (Quartus II Web Edition Software),
  • the Altera Quartus II Web Edition Software,
  • the Altera Software Installation and Licensing Manual for Windows,
  • the Quartus Two Development Software Literature including the Quartus II Handbook v12.1.0 (Complete Three-Volume Set), and
  • the Quartus Two Web Edition Licensing (no longer needed).

    Sample Altera VHDL documents are:

    • Plan to show pushbutton one (KEY3) ANDed with pushbutton 2 (KEY2) on LED ane (LEDR17) and pushbutton 1 (KEY3) ORed with pushbutton 2 (KEY2) on LED ii (LEDR16): buttonfunctions.vhd. The country of each of the pushbuttons is inverted to make it active high rather than active low.
    • Same program as buttonfunctions.vhd above, only with code included for pin assignments: buttonfunctionspinassign.vhd.

    • Programme to copy the land of pushbuttons 1 and 2 to LEDs 1 and 2, respectively: buttontoled.vhd.

    • 16-bit register: reg.vhd.
    • 16-bit register using std_logic for clk and en: regstd.vhd.

    • Dataflow iv-scrap comparator: comparator4bit.vhd.
    • Dataflow iv-bit comparator using std_logic: comparator4bitstd.vhd.
    • Behavioral iv-chip comparator looping over the bits: comparator4bitstdloop.vhd.
    • Behavioral four-bit comparator looping over the $.25 with specified pin assignments: comparator4bitstdlooppinassign.vhd.

    • Programme to invert the state of an LED segment (using pushbuttons, not border triggered): invertSegment.vhd.
    • Program to invert the country of an LED segment (using pushbuttons, edge triggered): invertSegmentEdge.vhd.
    • Program to invert the state of an LED segment (using slide switches, edge triggered, but not debounced): invertSegmentEdgeNotDebounced.vhd.
    • Program to invert the state of an LED segment (using slide switches, border triggered and debounced): debounceSwitch.vhd.

    • Programme to rotate LED segments using free-running clock: rotateSegments.vhd.

    • Program to rotate LED segments using pushbutton: identifySegments.vhd.

    • Up-down counter: upDownCounter.vhd.

    • Various additional four-flake comparators including a structural design showing use of a user library: comparator4bitstdseveral.vhd.
      • 2-input XNOR gate: xnor02.vhd.
      • 4-input AND gate: and04.vhd.
      • NOT gate: not01.vhd.
      • User library declaration: gates.vhd.
    • 4-bit comparators as higher up, just using std_ulogic and std_ulogic_vector: comparator4bitstdulogicseveral.vhd.
    • Program that shows pick of ane of several architectures for an entity: comparator4bitstdseveralconfig.vhd.

    CSCI Eastward-93 Awarding Notes for using the Altera FPGAs:

    • AN1: Dealing with DE2-115 Current Strength and Slew Rate: AN1 DE2-115 Current Forcefulness and Slew Rate.txt
    • AN2: DE2-70 Can't place multiple pins assigned to pin location Pin_AD25: AN2 DE2-70 Can't place multiple pins assigned to pin location Pin_AD25.txt
    • AN3: How to load a MIF file into Quartus: AN3 How to load a MIF file into Quartus.txt
    • AN4: How to view and alter memory in Quartus: AN4 How to view and change retentivity in Quartus.txt
    • AN5: How to run a serial port emulator: AN5 How to run a serial port emulator.txt
    • AN6: How to build a Quartus project that uses the memory subsystem: AN6 How to build a Quartus projection that uses the memory subsystem.txt
    • AN7: Notes on Using Series Port I/O: AN7 Notes on Using Series Port IO.txt
    • AN8: The Memory Subsystem and Retentiveness Addresses: AN8 The Memory Subsystem and Memory Addresses.txt

    Laboratory Documents and Programs:

    • The Altera Memory Initialization File (.mif) format is divers.
    • The Motorola Due south-record file format is defined.
    • A programme written in C to bank check Motorola S-record file format to ensure that information technology is acceptable.
    • A program written in C to convert a Motorola S-record file into a .mif file.
    • The specification for the interface to terminal I/O is defined.
    • The processor-to-memory interface is defined.
    • The documentation for the memory subsystem that needs to be compiled with student projects.
    • VHDL lawmaking for the memory subsystem for the DE2-seventy and for the memory subsystem for the DE2-115 is available here as zip files. The appropriate code needs to be compiled with each educatee project.

    USB to Serial Adapter:

    • Tripp-Low-cal Keyspan United states of america-19HS High-Speed USB to Serial Adapter
    • The United states-19HS is available at many resellers including Amazon, Provantage, Rakuten (Formerly Buy.com), TigerDirect & CDW
    • A male-to-female DB9 6' straight-through serial cable such equally the StarTech MXT100 is also needed to connect to the DE2-70 or DE2-115 board
    • The MXT100 is available at many resellers including Amazon

    Static dissipative devices used in the lab:

    • StarTech.com 24x27.5-Inch Desktop Anti-Static Mat M3013 (Beige).
    • StarTech.com ESD Anti Static Wrist Strap Band with Grounding Wire SWS100 (Blueish).
    • Transforming Tech 15'Fifty Depression Profile Common Signal Basis String or ESDProduct Common Point Ground, 10mm Male person Snap, 1 one thousand thousand Resistor, xv' String, Black.

    The ring terminal at the end of the common point ground wire should be attached to the nearest electrical outlet faceplace using the spiral between the outlets of a duplex outlet. Note that the alligator clips connected to the wires on both the anti-static mat and the wrist strap are removeable. The alligator clips are actually adapters from banana plugs to alligator clips like to the Mueller Electric BU-60. After the alligator prune adapter is pulled off, the banana plug tin exist plugged into one of the two assistant jacks on the mutual point ground.

    Software and Class Documents On-Line:

    Slides used in class

    • Form Agenda
    • Binary Logic Levels
    • Boolean Logic
    • Boolean Logic Continued
    • Advanced Boolean Logic
    • Laws and Theorems of Boolean Logic
    • Computer Logic
    • Place Values
    • Numeric Encodings
    • Grey Codes & Karnaugh Maps
    • Canonical Form, Minterms & Maxterms
    • Dealing with Fourth dimension in Combinational Circuits
    • MIPS Education Set
    • MIPS Datapath - Single Memory - No Pipelining
    • MIPS Coding Snippets
    • MIPS Assembly Language
    • MIPS Multicycle Data Path
    • PDP-8 Introduction to Programming, pp. ii-4 to 2-27
    • PDP-11 Handbook, pp. 6-10
    • PDP-11 Architecture Handbook, pp. 26-123
    • Hazards and Glitches
    • Endianness
    • Finite Country Machines
    • VHDL
    • VHDL Looping
    • Assembler Concepts (a.one thousand.a. Some Assembly Is Required)
    • Criteria for Final Project Proposal
    • Pipelining
    • Serial Communication
    • Caching
    • Last Projection Clocking Scheme
    • Comparators
    • Shifters
    • Register Assortment
    • Hardware Multiplication
    • Virtual Memory
    • Bones Electronics
    • Alpha Compages Handbook, Version 3
    • Intel 8008 CPU Users Manual
    • Intel 8080A Microprocessor Datasheet
    • Zilog Z80 Family CPU User Manual
    • Zilog Z80 CPU Product Specification

    The Course Questionnaire and Trouble Sets

    • The class questionnaire is available on-line. Please submit your completed questionnaire using "git" with the tag "problem-gear up-0" as soon as possible after our start course meeting.
    • Problem Set 0 (the course questionnaire, fix-this-program & word-count)
    • Problem Prepare 1 (textbook problems from Katz & Borriello)
    • Problem Gear up two (block diagram & pedagogy set)
    • Problem Set up three (VHDL counter, textbook problems from Katz & Borriello, last plan in high-level language)
    • Problem Set 4 (assembler, final program in your assembly language)
    • Preliminary Terminal Projection Trouble Prepare (ALU)
    • Problem Set up 5 (emulator)
    • Problem Set 6 (sequencer activity description, VHDL memory system interaction)
    • Concluding Projection (VHDL processor design)

    Piazza Wiki/Forum

    • A Piazza Wiki/Forum (on-line discussion list) for CSCI Eastward-93 is fix at Harvard Extension School CSCI E-93 Piazza Forum

    Online Software: Windows x, GNU, Cygwin, Windows Subsystem for Linux, Google Drawings, Visio, Dia, OmniGraffle, draw.io, SPIM, etc.

    • An ISO file for Windows ten is bachelor from Microsoft so that yous tin can set up up a Windows 10 VM to run Quartus.
    • Look here for data about the GNU Project and the Free Software Foundation.
    • Await here for data nigh getting GNU Emacs for Windows 95/98/ME/NT/XP and 2000.
    • Look hither for information about getting the Cygwin Linux-like environment for Windows.
    • The Windows Subsystem for Linux is available from Microsoft to permit developers to run GNU/Linux environments directly on Windows. The available distributions are Ubuntu, openSUSE, SLES (SUSE Linux Enterprise Server), Debian, and Kali. A link for manually downloading Linux distributions is also available.
    • Look here for GNU manuals online.
    • Look hither for a Listing of Linux distributions.
    • Look here for information nearly getting mtools: A collection of utilities to access MS-DOS disks from Unix.
    • Interesting mathematical/computer programming problems are available from Project Euler.
    • Google Drawings is a free, spider web-based diagramming software adult by Google. Information technology allows users to collaborate and work together in real time to create flowcharts, organisational charts, website wireframes, heed maps, concept maps, and other types of diagrams.
    • Y'all tin can purchase a copy of Visio at discounted educatee pricing. In add-on, other Microsoft Role products are available at bookish prices. To qualify as a student you must have a valid e-mail address at an educational establishment catastrophe with the domain suffix .EDU (i.due east., leina@contoso.edu) OR accept a valid email address at i of the educational institutions listed on Microsoft's web site AND y'all must be a student at a U.S. educational establishment and must be actively enrolled in at least 0.v form credit and exist able to provide proof of enrollment upon request. Follow this link for Microsoft student pricing. In add-on, you can download a free threescore-day evaluation version of Visio 2016 and other Microsoft products. Follow these links for Microsoft Visio, Microsoft Visio Professional 2016. Through your visitor, yous may be able to participate in the Microsoft Habitation Use Plan that will entitle y'all to purchase Office Professional Plus 2016, Visio Professional 2016, and Project Professional person 2016 for $ix.95 each. Additionally, the Home Use Program entitles y'all to buy backup DVDs for $fifteen.95 each.
    • Dia is a GTK+ based diagram cosmos program for Windows, Mac Os Ten, and Linux. It is released under the GPL license. Click here for the homepage for Dia. The Windows version is available for download hither. The Mac Os Ten version is available for download hither. The Linux version is available for download hither.
    • OmniGraffle is a diagramming and graphic design program for Mac Os X and iOS.
    • depict.io is an online diagram software/flowchart maker, built around Google Drive(TM), that is designed to supervene upon Visio(TM) in your Google Drive based office setup.
      draw.io enables you to draw flowcharts, org charts, wireframes, UML, mind maps and more, then save them to your Google Bulldoze. It uses the Google Bulldoze Real Time collaboration functionality, so multiple users tin piece of work on the same diagram simultaneously.
      depict.io is permanently free for all personal Google accounts, besides as Google for Educational accounts and for charitable usage..
    • Further information is bachelor about SPIM, the MIPS assembly linguistic communication simulator.

    Electronics stores in the Greater Boston Area

    • Y'all-Exercise-It Electronics Center. Located off I-95/Route 128 at exit 19A, 40 Franklin Street, Needham, MA 02494; Phone: ane.781.449.1005.
    • Radio Shack.

    Electronics distributors on the Web

    • Digi-Key Corporation. Located at 701 Brooks Avenue South, Thief River Falls, MN 56701-0677; Telephone: 1.800.344.4539, Fax: ane.218.681.3380.
    • Mouser Electronics, Inc.. Located at g Due north Principal Street, Mansfield, TX 76063-1511; Phone: 1.800.346.6873, Fax: 1.817.804.3899.
    • Allied Electronics. The corporate headquarters are located at 7410 Pebble Bulldoze, Fort Worth, TX 76118; Phone: 1.800.433.5700, Fax: ane.817.595.6444.

    Hardware distibutors on the Web

    • McMaster-Carr Supply Visitor. Located at P. O. Box 440, New Brunswick, NJ 08903-0440; Telephone: i.732.329.3200, Fax: 1.732.329.3772.
    • W. Due west. Grainger, Inc.. Located at 100 Grainger Parkway, Lake Forest, IL 60045-5201; Telephone: ane.847.535.1000.
    • Pocket-size Parts Inc. Was acquired by Amazon and operated as AmazonSupply. Now is part of Amazon Business.

    Harvard University Information Engineering science

    • At that place are computers bachelor for Extension student employ at 53a Church Street and in the Scientific discipline Centre, Room B-14. The Science Center calculator labs are open 24 hours a solar day. Apple, PC, and Linux workstations are available for student use.
    • Software is bachelor for free download from Harvard Data Technology
    • Harvard University Information technology:
      • Harvard Extension School, Computer Services.
      • Harvard Academy Data Technology Home Page.
      • New FAS Business relationship Creation. Besides accessible via this link.
      • How to opt-in to Google Apps for Harvard and open up a Harvard Gmail account.

    Department Home Folio

    • Section'south Abode Page
  • mcallisterowareasti.blogspot.com

    Source: https://cscie93.dce.harvard.edu/spring2020/index.html

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